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Timeline
Chapter title |
Design Challenges in Power Handling Techniques in Nano Scale Cmos Devices
|
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Chapter number | 49 |
Book title |
Advances in Communication, Network, and Computing
|
Published by |
Springer, Berlin, Heidelberg, February 2012
|
DOI | 10.1007/978-3-642-35615-5_49 |
Book ISBNs |
978-3-64-235614-8, 978-3-64-235615-5
|
Authors |
Veeranna D., Surya Naik V., Amit Degada, D., Veeranna, V., Surya Naik, Degada, Amit |