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Timeline
Mendeley readers
Chapter title |
A Technique to Generate CMOS VLSI Flip-Flops Based on Differential Latches
|
---|---|
Chapter number | 21 |
Book title |
Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
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Published by |
Springer, Berlin, Heidelberg, September 2002
|
DOI | 10.1007/3-540-45716-x_21 |
Book ISBNs |
978-3-54-044143-4, 978-3-54-045716-9
|
Authors |
Raúl Jiménez, Pilar Parra, Pedro Sanmartín, Antonio Acosta |
Mendeley readers
The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Unknown | 1 | 100% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Professor | 1 | 100% |
Professor > Associate Professor | 1 | 100% |
Readers by discipline | Count | As % |
---|---|---|
Physics and Astronomy | 1 | 100% |
Engineering | 1 | 100% |